EP1K50TC144-3

 

 

■ Programmable logic devices (PLDs), providing low cost 

system-on-a-programmable-chip (SOPC) integration in a single 

device

– Enhanced embedded array for implementing megafunctions 

such as efficient memory and specialized logic functions 

– Dual-port capability with up to 16-bit width per embedded array 

block (EAB)

– Logic array for general logic functions

■ High density

– 10,000 to 100,000 typical gates (see Table 1)

– Up to 49,152 RAM bits (4,096 bits per EAB, all of which can be 

used without reducing logic capacity)

■ Cost-efficient programmable architecture for high-volume 

applications

– Cost-optimized process

– Low cost solution for high-performance communications 

applications

 

 

 

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