W9425G6EH-4
4 M × 4 BANKS × 16 BITS DDR SDRAM
FEATURES
2.5V ±0.2V Power Supply for DDR266/333/400
2.6V ±0.1V Power Supply for DDR500
Up to 250 MHz Clock Frequency
Double Data Rate architecture; two data transfers per clock cycle
Differential clock inputs (CLK and CLK )
DQS is edge-aligned with data for Read; center-aligned with data for Write
CAS Latency: 2, 2.5 and 3
Burst Length: 2, 4 and 8
Auto Refresh and Self Refresh
Precharged Power Down and Active Power Down
Write Data Mask
Write Latency = 1
7.8µS refresh interval (8K/64 mS refresh)
Maximum burst refresh cycle: 8
Interface: SSTL_2
Packaged in TSOP II 66-pin, using Lead free materials with RoHS compliant
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批发与零售价位不同,无法一一明示,详情请通过邮件或客服咨询(国内销售部电话:0755-83957301,企业QQ: 2850151585), 由于电子元器件价格不稳定,时常有稍许变动,本公司未能及时调整,如您觉得售价不适,请与我们说明并适当议价,谢谢支持。